As semiconductor technology has advanced, data processing applications have also rapidly evolved to provide personal services to individual users. Such data processing applications include personal digital assistants (PDA), personal digital communicators (PDC), pocket schedulers, and the like. In implementing such data processing application, a dynamic random access memory and a read-only memory are generally used to provide the proper storage devices required for operation of these data processing applications. For example, the read-only memory (ROM) is typically utilized to store an operating system (OS) for the data processing application. As well, the dynamic random access memory (DRAM) may provide the necessary data memory and read-write memory required when performing operations within the data processing system.
While both DRAM and ROM memories are needed to implement most data processing applications, the methodologies utilized to fabricate each of these types of data processing systems are quite different and it is therefore not optimal to use one technique to build both types of memory on the same integrated circuit chip. As is well-known in the semiconductor art, ROM memories are typically implemented using either diffusion programming, gate programming, or metal programming techniques. Metal programming techniques selectively pattern metal conductors within the ROM to program that memory in accordance with the user's needs. Metal programming is particularly attractive as it is typically performed late in the ROM fabrication processing stage and, therefore, allows a designer of the memory system or a CPU or a microcontroller, to modify or create new programming code for an application late in the manufacturing process. However, while metal programming has such useful characteristics and is often used during ROM programming, metal programming is difficult to implement in a DRAM manufacturing process is utilized as process. Among other things, the normal number of metal layers which can be fabricated is limited, for the most part, to two in DRAMs. However, two metal layers are often insufficient to provide the desired number of metal layers required for ROM programming.
In addition to metal programming, gate programming may be utilized to program a ROM. When a ROM is programmed using the gate programming technique, the gate for the ROM memory cell is formed approximately during a mid-point of the processing steps. In contrast, a gate is formed in a DRAM during the initial steps of the DRAM manufacturing process because a capacitor utilized in a DRAM cell is then built on top of the gate. Thus, a DRAM process does not result in an optimal methodology for implementing gate programmed ROMs.
Furthermore, diffusion programming of ROMs also fails to result in optimal results when a DRAM process is used. In diffusion programming, the transistor drains are selectively implanted or masked in a diffusion process. Specifically, such diffusion programming is inflexible and does not allow a user to re-program or modify an existing program determined by diffusion wells formed during early manufacturing steps.
For these reasons, the DRAMs and ROMs are typically implemented on separate chips in today's IAs (information appliances) and then interconnected to the remainder of the system using a printed circuit board. Because at least two separate integrated circuit chips must then be utilized to provide the desired functionality, the size of resulting products is limited by the dimensional requirements of the two integrated circuit devices, not to mention power and system cost. In a technology where smaller size connotes the desired characteristics of faster speeds and lower power consumption, the requirement that devices be implemented in two separate integrated circuits may have prohibitive overhead costs for some applications. Additionally, if two integrated circuits are utilized to implement both a DRAM and a ROM in a data processing system, the performance of that system will necessarily be limited by the power consumption and speed limitations inherent in the use of two separate devices.
Therefore, a need exists for an integrated circuit that may implement both DRAMs and any non-volatile memory, including ROM, to reduce the power consumption and overhead costs associated with the implementation of two separate integrated circuits in some data processing applications. Additionally, a need exists for a methodology for manufacturing both DRAMs and non-volatile memories on a same integrated circuit in an efficient and reliable manner. Such an implementation can also enhance the "optimization of total memory address space and memory" for an IA (Information Appliance). Finally, for even further flexibility, it would be highly desirable to have the option of making at least some of the ROM cells electrically-programmable (i.e providing EPROM cells on-chip with DRAM cells and/or mask programmable ROMs.